----------------------- FINAL PROGRAM ------------------------

                         6th Workshop on 
        Post-Binary Ultra-Large-Scale Integration Systems
                     Best Western Claymore Inn
                  Antigonish, Nova Scotia, Canada 
                          May 27, 1997.
 
                  [Tutorial Session]
                      9:00--12:35
                     (Tutorial 1)
                      9:00--9:50
          Completeness, Composition and Clones in 
                   Multiple-Valued Logics
                   Prof. Ivo G. Rosenberg
              (University of Montreal, Canada)
 
                   (5-minute break)

                     (Tutorial 2)
                     9:55--10:45
          Fuzzy Logic and Its Mathematical Properties
         Prof. Noboru Takagi and Prof. Masao Mukaidono
    (Toyama Prefectual University and Meiji University, Japan)
 
                   (5-minute break)

                     (Tutorial 3)
                     10:50--11:40
              Multiple-Valued Logic Design
                  Prof. Jon T. Butler
             (Naval Postgraduate School, USA)
 
                   (5-minute break)
 
                    (Tutorial 4)
                    11:45--12:35
           Multiple-Valued VLSI Circuits and Systems
                Prof. Charles B. Silio, Jr.
               (University of Maryland, USA)

               (Lunch break   12:35--14:00)
 
                  [General sessions]
                     14:00--17:30
                      (Session 1)
                     14:00-16:05
     Title       : Minimization of Incompletely Specified Logic
                   Functions
     Chair       : Prof. Vlad P. Shmerko
                  (Technical University of Szczecin, Poland)
     Speakers    :
                ----------- Part 1 (14:00--15:00) ------------------
                1) Name     : Prof. M.Perkowski (USA)
                   Title    : Hardware Realization to Minimize 
                              Incompletely Specified Functions
                2) Name     : Dr. B.J.Falkowski, C.H.Chang 
                              (Singapoore)
                   Title    : Minimization of Partially Mixed Polarity
                              Reed-Muller Expansions
                3) Name     : Dr. L. Zakrevskij (Belarus)
                   Title    : Efficient Algorithm for Minimization of
                              Polynomial Representations of Weakly 
                              Specified Boolean functions and Systems

                   (5-minute break)

                ----- Part 2 (15:05--16:05) (Parallel Session) --------
                4) Name     : Prof. V. P. Shmerko, G.Holowinski, 
                              Dr.S.Yanushkevich (Poland)
                   Title    : Parallel and Distributed Realization of
                              Irredundant Minimization of MVL Functions
                5) Name     : Prof. R.S.Stankovic, M.Stankovic,
                              D.Jankovic (Yugoslavia),
                              Prof. V.P.Shmerko, Dr.S.Yanushkevich 
                   Title    : Optimizing the Calculation of Logic 
                              Derivatives through Decision Diagrams
                6) Name     : Prof. M.Perkowski (USA)
                   Title    : Use of Bi-Directional Decision Diagrams for 
                              Synthesis of Incomplete Functions

                    (5-minutes break)

                    (Session 2)  (Parallel Session)
                    15:05--16:05
     Title       : Fuzzy Logic
     Chair       : Prof. Yutaka Hata
                  (Himeji Institute of Technology, Japan)
     Speakers    : 
                1) Name     : Mr. Olivier Bournez
                   Title    : On the Computational Power of Continuous
                              Dynamical Systems
                2) Name     : Dr. Andreas Etzel
                   Title    : Fuzzy Optimization of Industrial Power
                              Plants
                3) Name     : Prof. Yutaka Hata
                   Title    : Fuzzy Medical Image Processing
      
                    (5-minutes break)

                       (Session 3)
                       16:10--17:30
     Title       : Challenging of Multiple-Valued VLSI Circuits
                   and Devices
     Chair       : Prof. K. C. Smith
                  (The Hong Kong University of Science & Technology,
                   Hong Kong)
     Speakers    : 
                1) Name     : Prof. Michitaka Kameyama 
                             (Tohoku University, Japan)
                   Title    : New Architecture for Multiple-Valued 
                              VLSI Systems
                2) Name     : Prof. Takafumi Aoki
                             (Tohoku University, Japan)
                   Title    : Beyond-Binary Arithmetic
                3) Name     : Prof. P. Glenn Gulak
                             (University of Toronto, Canada)
                   Title    : Multivalued Ferroelectric Associative 
                              Memory Design
                4) Name     : Dr. Takao Waho
                             (NTT System Electronics Lab., Japan)
                   Title    : MVL Circuits with Quantum Devices
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