RESEARCHERS IN TEST, VERIFICATION, VALIDATION, MANUFACTURABILITY AND RELATED AREAS.


Under Construction.

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
A
  • Dr.Vishwani Agrawal
  • Jacob Abraham
    B
  • Reinhard Bündgen: Research:Hardware Verification
  • George Berg, Associate Professor,
  • References
    Publications of Jon T. Butler

    Professor Bernd Becker, University of Freiburg, Germany

    Professor Randy Bryant, Carnagie Mellon University

    C
  • Kwang-Ting (Tim) Cheng
    D
    Rolf Drechsler, University of Freiburg, Germany
    E
    F
  • Fabrizio Ferrandi: Publication List
    Fujiwara Lab. Home Page (English)

    G
    H
  • PROF HAJJ's HOME PAGE
    I
    J
    K
  • Information on Thomas Kropf
  • Fiche d'expertise de Bozena Kaminska
    L
  • Bruce R. LittlefieldBruce R. Littlefield. Manager of Computing and Network Services.
  • MIRIAM E. LEESER
    M
  • Bibliography for Jean Christophe Madre
    AltaVista: Simple Query +Wojciech +Maly AltaVista: Simple Query +Wojciech +Maly
  • Wojciech P. Maly Web Page.
  • Dept. Overviews - Elec. & Comp. Eng. CMU centers.
  • Pennsylvania SEMATECH Center of Excellence for Rapid Yield Learning - Carnegie Mellon University Where Maly and Strojwas are co-directors.
  • DB&LP: Wojciech Maly Prospects for WSI: A Manufacturing Perpective. IEEE Computer, 1992.
  • Technology Working Groups' Membership Names of People in Sematech Groups.
  • CoCoBoard Mail Announcement of Wojciech's Maly seminar `` SIA Road Map and IC Design and Test'' in Illinois, Urbana-Champaign, May 13.

  • Prof. Marek-Sadowska's Group Web page with links.
  • Test Technology Technical Committee - Volunteers IEEE Computer Society Test Technology Technical Committee, addresses and contacts.

    • Professor Paul Molitor

    Professor D. Michael Miller, University of Victoria

    Professor Claudio Moraga, University of Dortmund, Germany

    Professor Jon. C. Muzio, University of Victoria

    Prof. Marek-Sadowska's Group, University of California, Santa Barbara

    Info
    the Department of Electrical and Computer Engineering at the University of California, Santa Barbara

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  • Professor Najm's homepage, VLSI Circuits Group, UIUC
    O
    P
  • Dr. Dhiraj K. Pradhan
  • Dhiraj K.Pradhan-Research and Expertise
  • Kim Petersén
    R
  • Ralf ReetzHomepage of Ralf Reetz,University of Karlsruhe, Germany
    S
    Professor Tsutomu Sasao, University of Kyushu, Japan

    Professor Fabio Somenzi, University of Colorado

    Professor Bernd Steinbach, Freiberg University of Mining, Freiberg, Germany

    T
  • J. Keith Townsend
    U
    W
  • Phillip J. Windley
  • Faculty Profile Prof. John Wyatt, MIT.
  • Biography of T.Williams.
    Y
  • Dr Trevor A York
    Z
    Zeljko Zilic -- papers

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    LARCH PROJECT

  • Larch Project at SRC Home PageWelcome to SRC's Larch Home Page. Last modified on Fri Feb 23 02:06:02 PST 1996 by schedler modified on Thu Oct 26 18:48:40 PDT 1995 by horning....
  • Jim Horning's Larch PageWelcome to Jim Horning's Larch Page. Introduction. Larch is a multi-site project exploring methods, languages, and tools for the practical use of formal...
  • LarchLarch Home Page. Larch is a multi-site project exploring methods, languages, and tools for the practical use of formal specifications. Much of the early..
  • Jim Horning's Larch PageJim Horning's Larch Page. Introduction. Larch is a multi-site project exploring methods, languages, and tools for the practical use of formal...

    UNIVERSITIES IN SWEDEN - RESEARCH ON VERIFICATION

  • Matz Kindahl - Formal MethodsFormal Methods. This page contains some documents and pages regarding formal methods on a general level. Here you can find case studies, introductions to..

    USA UNIVERSITIES - RESEARCH ON VERIFICATION

  • University of Cincinnati's Formal Hardware Verification ProjectTechniques for Large Scale Hardware Verification. Sponsored by the Defense Advanced Research Projects Agency, Information Technology Office (DARPA/ITO)...
  • SRI-CSL-TRLISTSRI International Computer Science Laboratory. Technical Reports (Since 1987) Fast Links: 1996 | 1995 | 1994 | 1993 | 1992 | 1991 | 1990 | 1989 | 1988 |...

    SRI - RESEARCH ON VERIFICATION.

  • SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. Theorem Proving: Not an Esoteric Diversion, but the Unifying Framework for Industrial Verification. D. A....
  • SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. Effective Theorem Proving for Hardware Verification. D. Cyrluk, S. Rajan, N. Shankar, and M.K. Srivas. This
  • SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. Ground Temporal Logic: A Logic for Hardware Verification. David Cyrluk and Paliath Narendran. Reprint from.
  • SRI-CSL-FM: RECENT PAPERSSRI International Computer Science Laboratory. The IEEE magazine Computer has a 15-page "roundtable" on formal methods in its April 1996 issue (Vol. 29,..
  • SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. Mechanized Formal Verification - Seven Papers. David Cyrluk, Patrick Lincoln, Steven P. Miller, Paliath...
  • David Cyrluk's Recent PapersRecent Papers. The following is a partial list of papers I have written. "Microprocessor Verification in PVS: A Methodology and Simple Example" by David..
  • SRI-CSL: RECENT PAPERSSRI International Computer Science Laboratory. A Tutorial on Using PVS for Hardware Verification. S. Owre, J. M. Rushby, N. Shankar and M. K. Srivas.
  • Henny Sipma's research linksHenny Sipma. Research links. Seminars. Security seminar. SRI-CSL seminar. Formal Methods. Resources. Theoretical Computer Science - Virtual Address Book...
  • SRI-CSL Technical Reports AbstractsSRI International Computer Science Laboratory. Technical Report Abstracts. An Overview of Enclaves 1.0. Li Gong. SRI-CSL-96-01. Abstract. With the advent..
  • SRI-CSL-FM: RECENT PAPERSSRI International Computer Science Laboratory. Recent Papers in Formal Methods and Dependable Systems. Fast Links: 1997 | 1996 | 1995 | 1994 | 1993 | 1992.
  • Formal Methods, SRI International, Former NewsSRI International Computer Science Laboratory. Formerly New Announcements. Updated August 28, 1996. A tutorial featuring PVS will be presented on October..
  • No Titledocumentstyle[11pt,cite,url]{article} \sloppy \topmargin -0.25in \textwidth 5.75in \textheight 8.25in \oddsidemargin .53in \evensidemargin .28in...

    STANFORD UNIVERSITY - RESEARCH ON VERIFICATION.

  • Hardware Verification GroupGroup Leader: David L. Dill. Research Associates: SeungJoon Park. Jens U. Skakkebæk. Ph.D. Students: Clark W. Barrett. Supratik Chakraborty. Satyaki..
  • No TitleName: OBJ3 Keywords: order-sorted equational logic, parameterized modules, rewriting Description: Semantics: the underlying logic, order-sorted equational.
  • No TitleReturn-Path: Date: Thu, 25 Jun 92 08:47:35 CDT From: Robert S. Boyer. To: nqthm-users@cli.com Subject: State of things Reply-To: boyer@cli.com Below is a..
  • EMail Msg <wfs6kjOKmlE2M=5GFi@arp>Re: Cold water. Zdzislaw Meglicki <Zdzislaw.Meglicki@arp.anu.edu.au> Mail folder: QED. Next message: Konrad Slind: "getting a formal..
  • EMail Msg <93Apr30.033243met_dst.8088@sunbroy14.informatik.tu-muenchen.de&gCold water. Konrad Slind <slind@informatik.tu-muenchen.de> Mail folder: QED. Next message: Zdzislaw Meglicki: "Re: Cold Water"Previous...
  • No TitleASIC & Systems State Key Laboratory. Director: Prof. Zhang Qianling.

    UNIVERSITIES IN FRANCE - RESEARCH ON VERIFICATION.

  • Liste des Publi VDSVDS PUBLICATIONS. Page réactualisée le 9 octobre 1996. BORRIONE D., BOUAMAMA H., DÉHARBE D., LE FAOU C., WAHBA A. HDL-Based...

    UNIVERSITIES IN DENMARK - RESEARCH ON VERIFICATION.

  • Hardware Verification using Monadic Second-Order LogicHardware Verification using Monadic Second-Order Logic. David A. Basin and Nils Klarlund. We show how the second-order monadic theory of strings can be..
  • No Titlestring{brics = "{BRICS}"} @string{daimi = "Department of Computer Science, University of Aarhus"} @string{iesd = "Department of Mathematics and Computer...

    UNIVERSITIES IN UNITED KINGDOM - RESEARCH ON VERIFICATION.

  • Typed CIRCAL: A High Level Framework for Hardware VerificationDocument Archive. Typed CIRCAL: A High Level Framework for Hardware Verification George J. Milne, and Mauro Pezze. Tech Report No. RR-88-04
  • Hardware VerificationNext: Program Synthesis Up: Applications to System Previous: Applications to System. Hardware Verification. Francisco Cantu has applied proof planning to..
  • Hardware VerificationNext: Decision Procedures Up: Applications of Proof Previous: Bridge. Hardware Verification. Francisco Cantu-Ortiz has just started an investigation of..
  • Applications to System DevelopmentNext: Hardware Verification Up: Achievements of the Previous: Reasoning in Framework. Applications to System Development. Hardware Verification. Program...

    UNIVERSITIES IN KOREA - RESEARCH ON VERIFICATION.

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    GERMAN UNIVERSITIES - RESEARCH ON VERIFICATION

  • Restricted Branching Programs and Hardware Verification, by S. PonzioPhD Theses Series of ECCC. Stephen J. Ponzio: Restricted Branching Programs and Hardware Verification. [PostScript (520KB)] Abstract. This thesis concerns.
  • Reinhard Bündgen: Research:Hardware VerificationReinhard Bündgen, Research. Hardware Verification. Publications / Preprints. R. Bündgen & W. Küchlin: "Term Rewriting as a Tool for...
  • Harald RueßUniversität Ulm, Abteilung Künstliche Intelligenz. Current Teaching: Hardware Verification. Lab Exercises: Hardware Verification. Course...
  • ProjectsProjects Overview. OFFIS - R&D Division Embedded Systems. EU. FORMAT Formal Methods in Hardware verification. EuroFORM Formal Methods for Correct.
  • 3TAP: Publications by Subject3TAP: Publications by Subject. The following is a list of papers, report, and other publications written in connection with. sorted by subject. Subjects:..
  • No TitleGoal XXXXXXXXXXXXXXXXX * Support "doing" mathematics by computer using one interface * All phases of doing mathematics, see "creativity spiral", should be.
  • Papers on our work using PVSUniversität Ulm, Fakultät für Informatik, Abt. KI - PVS @ Ulm. Papers on our work using PVS. Fast Links: Semantics of Programming Languages

    VERIFICATION BIBLIOGRAPHIES

  • Bibliography on Hardware Verification and Formal MethodsBibliography on Hardware Verification and Formal Methods. This bibliography forms a part of the Computer Science Bibliography Collection.
  • Bibliography on Hardware Verification and Formal MethodsBibliography on Hardware Verification and Formal Methods. This bibliography forms a part of the Computer Science Bibliography Collection.
  • No TitleArticle: 2275 of comp.lang.vhdl Path: pitt.edu!birdie-blue.cis.pitt.edu!gatech!howland.reston.ans.net!pipex!uknet!nessie!nessie.mcc.ac.uk!sr From:...
  • Abstracts of Selected PublicationsAbstracts of Selected Publications. A Modular Presentation of Modal Logics in a Logical Framework. David Basin, Sean Matthews and Luca Vigano. FILES:...
  • No TitleTPTP Citations. The following is a summary of the papers which cite the TPTP Problem Library. The purpose of this index is to raise awareness about system.
  • Laboratory for Applied Logic Reading ListLAL READING LIST. The following papers are suggested readings for new member of the Laboratory for Applied Logic. The readings will acquaint you with some.
  • Laboratory for Applied LogicFORMAL METHODS AROUND THE WORLD. A number of other research laboratories in formal methods have made information available on the web. This page collects..
  • Bibliographies on Software/Hardware Engineering and Formal MethodsThe Collection of Computer Science Bibliographies. Up: The Collection of Computer Science Bibliographies. Home. Bibliographies on Software/Hardware..
  • ATG Reading ListAbstract Type Group Reading List. The List. HML: A Hardware Description Language Based on SML John O'Leary, Mark Linderman, Miriam Leeser, Mark Aagard...

    BENCHMARK CIRCUITS FOR VERIFICATION

  • IFIP WG10.5 Hardware Verification Benchmark SuiteIFIP WG10.5 Benchmark Circuits. This is the official home page of the IFIP WG10.5 Benchmark-Circuits Suite for Hardware Verification. The set of benchmark.
  • 2 The Benchmark CircuitsNext] [Previous] [Top] 2 The Benchmark Circuits. 2.1 - Releases. 2.2 - Verification Problem Presentation. 2.2.1 - VHDL. 2.2.2 - Storage Elements and...
  • DocumentationNext] Benchmark-Circuits for Hardware -Verification v1.1.0. This is not the actual version 1.2.0 which can be only found directly at our ftp server!..

    PHD THESIS ON VERIFICATION.

  • No TitleRestricted Branching Programs and Hardware Verification PhD Thesis, Stephen Ponzio, MIT, August 1995. Table of Contents.

    CONFERENCES RELATED TO FORMAL VERIFICATION.

  • No TitleThe International Conference on Formal Methods in Computer-Aided Design. (FMCAD -- Successor to TPCD) CALL FOR PAPERS. Palo Alto, CA, USA. 6 - 8. November.
  • Ninth Annual Conference on Computer AssuranceThis information provides you with details concerning The Ninth Annual Conference on Computer Assurance.
  • pre-conference Workshop on Applied Formal MethodsWORKSHOP ON APPLIED FORMAL METHODS. Dates : December 14-17, 1996 Venue : Raman Auditorium Sponsored by: Indian Association Of Research in Computing..
  • No TitleFMCAD 96 Program. Wednesday, November 6, 1996. 8:00-8:50. Check-In and Late Registration. 9:00-10:00. Invited Talk. Chair: M. Srivas. Kurt Keutzer,...
  • No TitleProgramme The 1996 International Conference on Theorem Proving in Higher Order Logics Monday 26 August
  • The TPCD ProceedingsTheorem Provers in Circuit Design. Proceedings of the IFIP WG10.2 International Conference on Theorem Provers in Circuit Design: Theory, Practice, and...
  • No TitleCALL FOR PAPERS | | | | The International Conference on | | | | Formal Methods in Computer-Aided Design: | | (FMCAD -- Successor to TPCD) |

    COMPUTATIONAL LOGIC INC. (CLI) COMPANY

  • No TitleTechnical Reports September 6, 1994. Computational Logic, Inc. 1717 West Sixth St., Suite 290 Austin, Texas 78703-4776. 101. Design Goals of ACL2, by Matt.
  • No TitleHardware Verification Using Mechanical Theorem Provers. 3 Days. Prerequisites: Introduction to the Boyer-Moore Theorem Prover and Introduction to Hardware.

    OTHER INDUSTRIAL RESEARCH ON VERIFICATION

  • B-Tree Systems, Inc.B-Tree's Career Opportunity Center. Welcome to B-Tree's Career Opportunity Center. If you have read about our unique product and its enviable position in.

    MILITARY RESERACH ON VERIRFICATION

  • COMPLEX SYSTEMSCOMPLEX SYSTEMS Mr. Robert Parker. Good morning. I'm going to talk to you for a few minutes about this area of "Complex Systems" and a task in...

    VERIFICATION OF MICROPROCESSORS

  • No TitleMODEL: mpc860_hv VERSION: v1.3 TITLE: Quad Integrated Communications Controller DATE: 20-Mar-97 FUNCTION: processors SUBFUNCTION: microprocessor BASE PART.
  • Structure and Correctness of MicroprocessorsStructure and Correctness of Microprocessors. A C J Fox, Dr N A Harman and Professor J V Tucker. Work on the structure and correctness of microprocessors.
  • Formal Hardware VerificationCoverage-Based Microprocessor Verification. Formal Hardware Verification. Practical Aspects of Formal hardware Verification Verifying the correct behavior.

    VERIFICATION RESEARCH OF INTEL

  • Intel and the CommunityVisiting Faculty. Professor Andrew M. Fraser. Professor Shang-Hua Teng. Professor Alok Choudhary. Professor Carl Seger. Professor David L. Dill.

    BINARY DECISION DIAGRAMS IN VERIFICATION.

  • BDDTCL: An Environment for Visualizing and Manipulating Binary Decision DiagBDDTCL: An Environment for Visualizing and Manipulating Binary Decision Diagrams. Kurt E. Partridge University of Washington Box 352350 Seattle

    VERIFICATION FOR TELECOMMUNICATION.

  • Telecommunications BackgrounderSpecialized Verification Tools for Telecommunications Applications. Telecommunications Workbenches Product Backgrounder. Contents: Introduction..

    RUBY LANGUAGE

  • Mary Sheeran's useful linksHardware design. The Ruby relational design language. Designing Correct Circuits '96. A list of conferences and workshops in formal methods for hardware...

    ML LANGUAGE

  • ReferencesNext: About this document Up: The Metalanguage ML Previous: Experimental support for. References. 1. P.B. Andrews, An Introduction to Mathematical Logic...

    HOL LANGUAGE

  • ReferencesNext: About this document Up: The HOL System Previous: Timing and counting. References. 1. P.B. Andrews, An Introduction to Mathematical Logic and Type..
  • Demonstration Code for Hardware Verification in HOLDemonstration Code for Hardware Verification in HOL. The following files introduce proof techniques for HOL. ML expressions. Sieve of erosthanes in ML...
  • The HOL SystemThe HOL System. The HOL System is an environment for interactive theorem proving in a higher-order logic. Its most outstanding feature is its high degree..
  • ReferencesNext: About this document Up: Theorem Proving in HOL Previous: Theorem continuations without. References. 1. P.B. Andrews, An Introduction to Mathematical.
  • Programme: Theorem Proving in Higher Order LogicsProgramme: TPHOLs'96. The 1996 International Conference on Theorem Proving in Higher Order Logics. Monday 26 August. 12.00 Registration. 12.30 Lunch..
  • Information about new_theory `HOL88`new_theory `HOL88` An Introduction to Hardware Verification in Higher Order Logic. by. Graham Birtwistle, Shiu-Kai Chin, Brian Graham. Table of contents..
  • Information about new_theory `HOL88`new_theory `HOL88` An Introduction to Hardware Verification in Higher Order Logic. by. Graham Birtwistle, Shiu-Kai Chin, Brian Graham. Table of contents..
  • Description of the HOL Theorem Proving SystemDescription of the HOL Theorem Proving System. Keywords: Higher Order, Classical, Natural deduction with tactics. Description: Semantics: Classical higher.
  • The HOL Theorem Proving SystemWelcome to the HOL Documentation Page. The Laboratory for Applied Logic at Brigham Young University is pleased to provide documentation and information...
  • Current State of KnowledgeNext: Organizing Abstract Modules Up: Project Description Previous: Impact. Current State of Knowledge.   The HOL theorem proving system [GM93] has...
  • TPHOLs'96 bibliographic informationLecture Notes in Computer Science 1125. Joakim von Wright, Jim Grundy, and John Harrison (Eds.) Theorem Proving in Higher Order Logics: 9th International.
  • TPHOLs '96TPHOLs '96. CALL FOR PARTICIPATION 1996 INTERNATIONAL CONFERENCE ON THEOREM PROVING IN HIGHER ORDER LOGICS...
  • No TitleCP95 final call for papers (text+tex)
  • Ninth Annual Conference on Computer AssuranceThis information provides you with details concerning The Ninth Annual Conference on Computer Assurance.