R. Rovatti, G. Baccarani ``Fuzzy Reversible Logic'', IEEE International Conference on Fuzzy Systems
(FUZZ-IEEE'98) Category:Integrated Electronics

Title:Reversible Energy Recovery Logic Circuits and Its 8-Phase Clocked Power Generator for
Ultra-Low-Power Applications

Author:Joonho LIM,Dong-Gyu KIM,Soo-Ik CHAE

SUMMARY We proposed Reversible Energy Recovery Logic (RERL) using an 8-phase clocking
scheme, which is a dual-rail reversible adiabatic logic for ultra-low-energy applications. Because we
eliminated non-adiabatic energy loss in RERL by using the concept of reversible logic, RERL has only
adiabatic and leakage losses. In this paper we explain its operation and logic design and present its
simulation and experimental results. We also present an energy-efficient 8-phase, clocked power
generator that uses an off-chip inductor. With simulation results for the full adder, we confirmed that the
RERL circuit consumed substantially less energy than other logic circuits at low-speed operation. We
evaluated a test chip implemented with a 0.6-m CMOS technology, which integrated a chain of inverters
with a clocked power generator. In the experimental results, the RERL circuit consumed only 4.5% of the
dissipated energy of a static CMOS circuit at an optimal operating speed of 40 kHz. In conclusion, RERL
is suitable for the applications that do not require high performance but low-energy consumption because
its energy consumption can be decreased to the minimum by reducing the operating frequency until
adiabatic and leakage losses are equal.

key words reversible logic,adiabatic circuit,clocked power generator,RERL (reversible energy recovery
logic)