28 Apr 97 - biz.jobs.offered
<336edad4.4145490@news>
jobs@s3.com (S3 Inc.)

US- VIDEO BOARD DESIGN FPGA - S3 Inc

28 Apr 97 - tnn.jobs
<338192a7.16347101@news>
jobs@s3.com (S3 Inc.)

Portland OR: ASIC Designer, VHDL, FPGA

29 Apr 97 - austin.jobs
<3365435d.0@atheria.europa.com>
azad@europa.com (AZAD)

FCCM'97 Preliminary Program

1 Apr 97 - comp.arch
<5hrrcg$n1@potomac.znet.com>
jmarnold@potomac.znet.com (Jeffrey M. Arnold)

Surveys on Reconfigurable Computing now available

14 Apr 97 - comp.arch.fpga
<hauck-1404970103420001@bellport8.ece.nwu.edu>
hauck@ece.nwu.edu (Scott A. Hauck)

Tutorial on Reconfigurable Computing at DAC, June 13th, Anaheim

14 Apr 97 - comp.arch.fpga
<hauck-1404970107240001@bellport8.ece.nwu.edu>
hauck@ece.nwu.edu (Scott A. Hauck)

Correction: Surveys on Reconfigurable Computing now available

14 Apr 97 - comp.arch.fpga
<5iufq1$ji5$1@news.ece.nwu.edu>
hauck@ece.nwu.edu (Scott Alan Hauck)

Re: Reconfigurable Computing

23 Apr 97 - comp.arch.fpga
<5jl621$6i8@potomac.znet.com>
jmarnold@potomac.znet.com (Jeffrey M. Arnold)

Tutorial on Reconfigurable Computing at DAC, June 13th, Anaheim

2 May 97 - comp.arch.fpga
<hauck-0205971018270001@vienna.ece.nwu.edu>
hauck@ece.nwu.edu (Scott A. Hauck)

PART 97 Conference: Special Session - Reconfigurable Computing

21 Apr 97 - comp.arch.fpga
<5jernk$e5f@dove.qut.edu.au>
n.bergman@qut.edu.au (Dr. Neil Bergman)

Reconfigurable logic

16 Mar 97 - comp.arch
<332BBF8B.2963@ix.netcom.com>
Shigeki Shimomura <shimo@ix.netcom.com>

Re: Reconfigurable logic

17 Mar 97 - comp.arch
<332CDF60.4D63@churchill.columbiasc.ncr.com>
Joe Hinrichs <jhinrich@churchill.columbiasc.ncr.com>

Re: Reconfigurable logic

18 Mar 97 - comp.arch
<5gma3h$1i0s@news.rchland.ibm.com>
cecchi@signa.rchland.ibm.com (Del Cecchi)

Reconfigurable Computing

23 Apr 97 - comp.arch.fpga
<5jk8hh$jh2@newsstand.cit.cornell.edu>
pirger@astrosun.tn.cornell.edu (Bruce Pirger)

Parallel reconfigurable Mesh Simulator?

5 May 97 - comp.arch
<5klnp6$bpb@seagoon.newcastle.edu.au>
carsten@cs.newcastle.edu.au (Carsten Steckel)

Call for participation, Advanced PLD & FPGA Day UK and Sweden

24 Apr 97 - comp.arch.fpga
<766787499wnr@lfields.demon.co.uk>
Peter Clarke <pclarke@lfields.demon.co.uk>

US-MD-Annapolis , Electrical and Computer Engineers, ASIC, Xilinx FPGA Hardware, Software Design

23 Apr 97 - dc.jobs
<5jludv$8uf@lana.zippo.com>
ams@annapmicro.com (Annapolis Micro Systems, Inc.)

US-MD-Annapolis , Electrical and Computer Engineers, ASIC, Xilinx FPGA Hardware, Software Design

1 May 97 - dc.jobs
<5kaqfo$22f@snews1.zippo.com>
ams@annapmicro.com (Annapolis Micro Systems, Inc.)

Re: Xilinx FPGA & SIMMs

11 Mar 97 - comp.arch.fpga
<33259D96.4BBA@univision.com>
"John L. Smith" <jsmith@univision.com>

Re: Xil FPGA: Usage of Multi-purpose pins as I/O

11 Mar 97 - comp.arch.fpga
<3325F0B3.2A4C@xilinx.com>
Peter Alfke <peter@xilinx.com>

Re: FPGA Reliability

12 Mar 97 - comp.arch.fpga
<peter-1203970955240001@appsmac-1.xilinx.com>
peter@xilinx.com (Peter Alfke)

Re: Xil FPGA: Usage of Multi-purpose pins as I/O

13 Mar 97 - comp.arch.fpga
<332805e3.72615784@news.wwa.com>
aweir@spherecom.com (Alan Weir)

Re: FPGA Reliability

13 Mar 97 - comp.arch.fpga
<01bc2fd4$8fc5ac00$6e0db780@Rich>
"Rich K." <rich.katz@gsfc.nasa.gov>

Re: Xilinx FPGA & SIMMs

14 Mar 97 - comp.arch.fpga
<kS9y9HAW5bKzEww6@smte.demon.co.uk>
Andrew Papageorgiou <ap@smte.demon.co.uk>

Re: FPGA Reliability - JTAG reset

14 Mar 97 - comp.arch.fpga
<E70vAH.8rE@nonexistent.com>
"Kardos, Botond" <kardos@mail.matav.hu>

FPGA and PLL

21 Mar 97 - comp.arch.fpga
<A.Cosic.1823.3331D4F3@eee.utas.edu.au>
A.Cosic@eee.utas.edu.au (Alec Cosic)

US-FL-Hardware Engineer (FPGA / ASICS)-Tampa Bay

26 Apr 97 - misc.jobs.offered
<5jrj4e$paf@news-in.tiac.net>
nospam@net-temps.com (MGA Technologies)

ASIC ENGINEER.; FPGA, RF, VHDL; MILPITAS, CA

25 Apr 97 - misc.jobs.offered
<33613305.81661655@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

US-IN-Baseband electronics tactical radio DSP FPGA high volume manufacturing-

26 Apr 97 - biz.jobs.offered
<5jrs8r$8f2@news-in.tiac.net>
nospam@net-temps.com (Sonus Corporation)

US-TX-Dallas -Hardware Design Engineer FPGA,Gate Arrays,Asic-Dallas

26 Apr 97 - biz.jobs.offered
<5jrskd$8rt@news-in.tiac.net>
nospam@net-temps.com (Specialty Resource Group Inc.)

US-FL-Digital Design Engineer/ CAD/ XILINX/ FPGA/ Viewlogic-Tampa

26 Apr 97 - biz.jobs.offered
<5jruj9$bjv@news-in.tiac.net>
nospam@net-temps.com (TECH/AID)

US-MA-Electrical Engineer CCD,FPGA-

25 Apr 97 - biz.jobs.offered
<5jp5np$rje@news-in.tiac.net>
nospam@net-temps.com (Business Logic, Inc)

US-NM-FPGA, Digital/Analog Circuit Design, Robotics-Albuquerque

25 Apr 97 - misc.jobs.offered
<5jph3b$c4v@news-in.tiac.net>
nospam@net-temps.com (Higgins Associates)

USA-CA Design Engineer/PCB's-FPGA's-ServerNet (Apr 26 02:30:04)

26 Apr 97 - misc.jobs.offered
<5jsr6q$cu6$1@n1.wdc.net>
75573.223@compuserve.com (see.ad.content)

US-FL-Tampa Bay Hardware Engineers, FPGA, QuickVHDL, Mentor Simulation Tools, BSEE

24 Apr 97 - misc.jobs.contract
<5jne5c$3br$4@cambridge.emi.net>
warnold@emi.net (W.J. Arnold)

US-FL-Tampa Bay Hardware Engineers, FPGA, QuickVHDL, Mentor Simulation Tools, BSEE

23 Apr 97 - misc.jobs.contract
<5jks58$bbu$45@cambridge.emi.net>
warnold@emi.net (W.J. Arnold)

SR. HARDWARE ENGS.; FPGA, LAN/WAN DESIGN; SILICON VALLEY

25 Apr 97 - misc.jobs.offered
<33613332.81706603@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

US-NM-Albuquerque Electrical Design Engineer, Robotics, FPGA, Digital & Analog, Higgins Associates

26 Apr 97 - biz.jobs.offered
<JAABAHF481.835@news.HeadHunter.NET>
"FREE www.HeadHunter.NET" <poster@headhunter.net>

US-NJ-Electronic Engineer, Asic, VHDL, FPGA, CMOS-

26 Apr 97 - biz.jobs.offered
<5jrta6$9o0@news-in.tiac.net>
nospam@net-temps.com (Summit Systems Consulting)

USA-CA Design Engineer/PCB's-FPGA's-ServerNet (Apr 27 02:30:04)

27 Apr 97 - misc.jobs.offered
<5jva9f$11j$1@n1.wdc.net>
75573.223@compuserve.com (see.ad.content)

US-CA-San Jose-HWE-digital/ Networking/FPGA's-Recruiter

27 Apr 97 - ba.jobs.contract
<3363c775$08@dice.com>
christine@lrc.com (LLOYD-RITTER CONSULTING, INC.)

US-FL-Tampa Bay Hardware Engineers, FPGA, QuickVHDL, Mentor Simulation Tools, BSEE

25 Apr 97 - fl.jobs
<5jp0jc$qeo$4@cambridge.emi.net>
warnold@emi.net (W.J. Arnold)

HARDWARE ENGINEERS, PAL/ FPGA,CANADA/ US

25 Apr 97 - can.jobs
<01bc51a1$f56bd2c0$133d65cc@6640bbq1s098>
"SHEILA VENKATESH" <sheilav@qedp.com>

US-FL-Tampa Bay Hardware Engineers, FPGA, QuickVHDL, Mentor Simulation Tools, BSEE

22 Apr 97 - misc.jobs.contract
<5jjjfg$nif$8@cambridge.emi.net>
warnold@emi.net (W.J. Arnold)

Re: Call for participation, Advanced PLD & FPGA Day UK and Sweden

25 Apr 97 - comp.arch.fpga
<33605A15.2BE@ecs.soton.ac.uk.nospam>
Tim Forcer <tmf@ecs.soton.ac.uk.nospam>

NY-White Plains - ASIC Design, VHDL, Verilog, FPGA, UNIX, C

25 Apr 97 - misc.jobs.contract
<b25.9/21/95M55.611040@slip166-72-19-94.ny.us.ibm.net>
vailj@slip166-72-19-94.ny.us.ibm.net

!US-FL-Orlando: ASIC/FPGA, VHDL-perm

25 Apr 97 - misc.jobs.offered
<5jqu03$1rn2$34@news.gate.net>
Alan.Chevrier@SoftDesDev.com

USA-CA Design Engineer/PCB's-FPGA's-ServerNet (Apr 25 02:30:04)

25 Apr 97 - ba.jobs.offered
<5jqdgo$7hp$1@n1.wdc.net>
75573.223@compuserve.com (see.ad.content)

USA-CA Design Engineer/PCB's-FPGA's-ServerNet (Apr 25 02:30:04)

25 Apr 97 - biz.jobs.offered
<5jqdgg$7ho$1@n1.wdc.net>
75573.223@compuserve.com (see.ad.content)

San Mateo Hardware Project Manager ASIC's & FPGA's Board Development/Design permanent

23 Apr 97 - biz.jobs.offered
<5jm5js$d17$25@ralph.vnet.net>
jobs@binarytek.com (S. A. Parzick)

AZ-PHX-CONTRACT - FPGA, MENTOR H/W ENGINEER

25 Apr 97 - az.jobs
<5jrb6n$h0e@sjx-ixn6.ix.netcom.com>
Troy Shireman <voltphx4@ix.netcom.com>

US-CA Electrical Engineers - T1, FPGA.

25 Apr 97 - misc.jobs.contract
<97250463554.5710ntes@iquest.com>
jobs@ntes.com (NTES Jobs)

US-TX-Dallas-Hardware Architect, ASIC, FPGA (Recruiter)

25 Apr 97 - misc.jobs.offered
<5jqni0$2na@sjx-ixn3.ix.netcom.com>
sherryj@boltongrp.com (Sherry)

SYS. DESIGN ENG.; PCB, ASIC, FPGA; SAN JOSE, CA

25 Apr 97 - misc.jobs.offered
<336132bc.81588595@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

HARDWARE DESIGN ENG., ASIC/FPGA; SAN JOSE, CA

25 Apr 97 - misc.jobs.offered
<33613318.81680754@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

ASIC, FPGA, Verilog, Synopsys- Silicon Valley

25 Apr 97 - ba.jobs.offered
<33612d8f.80822342@192.168.0.1>
jeremy@mccoyltd.com (Jeremy Petrosino)

Cupertino ASIC Design engineers CMOS VERILOG FPGA

25 Apr 97 - ba.jobs.offered
<33613fff.33619633@news.wa.net>
sharron@ix.netcom.com (Sharron Lawson)

Cupertino ASIC Design engineers CMOS VERILOG FPGA

25 Apr 97 - ba.jobs.offered
<3361429c.34288567@news.wa.net>
sharron@ix.netcom.com (Sharron Lawson)

US-BAY AREA, CA, FPGA Field Applications Engineer (Recruiter)

25 Apr 97 - ba.jobs.offered
<5jrfrg$k61@dfw-ixnews4.ix.netcom.com>
turnerjo@ix.netcom.com (Joe Turner)

US-BAY AREA, CA, FPGA Field Applications Engineer (Recruiter)

25 Apr 97 - biz.jobs.offered
<5jrfsi$k61@dfw-ixnews4.ix.netcom.com>
turnerjo@ix.netcom.com (Joe Turner)

US-FL-Hardware Engineer (FPGA / ASICS)-Tampa Bay

26 Apr 97 - biz.jobs.offered
<5jrj4e$paf@news-in.tiac.net>
nospam@net-temps.com (MGA Technologies)

US-IN-Baseband electronics tactical radio DSP FPGA high volume manufacturing-

26 Apr 97 - in.jobs
<5jrs8r$8f2@news-in.tiac.net>
nospam@net-temps.com (Sonus Corporation)

SR. HARDWARE ENGS.; FPGA, LAN/WAN DESIGN; SILICON VALLEY

23 Apr 97 - misc.jobs.offered
<335e9df3.85336127@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

Hardware Engineering Manager ASIC Design & Board Design FPGA's Fast Paced High-Tech Company Seeks Fire Ball Style Director!!! Permanent

23 Apr 97 - ba.jobs.offered
<335e5bd7.80312286@news.vnet.net>
jobs@binarytek.com ( Binary Tech.)

US-MD-Analog Engineers, Digital Engineers, FPGA/Gate Array Engineers-Germantown

23 Apr 97 - biz.jobs.offered
<5jm279$cak@news-in.tiac.net>
nospam@net-temps.com (ACS)

HARDWARE DESIGN ENG., ASIC/FPGA; SAN JOSE, CA

23 Apr 97 - misc.jobs.offered
<335e9e0f.85364289@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

ASIC ENGINEER.; FPGA, RF, VHDL; MILPITAS, CA

23 Apr 97 - misc.jobs.offered
<335e9e1d.85377729@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

US-CA-Sr. Hardware Engineer with ASIC/FPGA, mixed signal experience-

24 Apr 97 - biz.jobs.offered
<5jmfnp$r78@news-in.tiac.net>
nospam@net-temps.com (NATIONAL SOFTWARE ASSOCIATES)

US-CA-Petaluma-Digital Design Engineer, FPGA, Modems (Recruiter)

24 Apr 97 - ba.jobs.offered
<5jo8pg$f96@dfw-ixnews12.ix.netcom.com>
sherryj@boltongrp.com (Sherry)

US-CA-San Mateo-Board Level Engineer, FPGA, Verilog (Recruiter)

24 Apr 97 - ba.jobs.offered
<5jo8sr$f96@dfw-ixnews12.ix.netcom.com>
sherryj@boltongrp.com (Sherry)

!!OR-Portland-Regional Sales Manager: PLD, FPGA, HDPLD

24 Apr 97 - misc.jobs.offered
<5johf8$aic$165@news.xmission.com>
htr@xmission.com (HTR)

San Jose-Sr. FPGA Designer wanted for start up company

24 Apr 97 - ba.jobs.offered
<335ecb32.549064607@news.wa.net>
tom@connexn.com (Tom Peterson)

ASCIS Logic Design Engineer (FPGA, PLD, ROM, Verilong, ASCI, ADC, CAC, PLL) - East Bay; Northern CA

24 Apr 97 - biz.jobs.offered
<5joqho$45s@chile.earthlink.net>
tqtech@earthlink.net (TransQuest Technologies)

US-CA-EDA Methodology Engineer/FPGA & PCB Tools-

25 Apr 97 - biz.jobs.offered
<5jp68m$s8o@news-in.tiac.net>
nospam@net-temps.com (CAE RECRUITERS)

US-MA-FPGA Logic Design Engineerff-

25 Apr 97 - biz.jobs.offered
<5jp6aa$sa1@news-in.tiac.net>
nospam@net-temps.com (CAE RECRUITERS)

US-MD-Digital Design Hardware Engineer (EPLD, FPGA, High-Speed)-Clarksburg

25 Apr 97 - biz.jobs.offered
<5jp8bd$1mc@news-in.tiac.net>
nospam@net-temps.com (COMSAT Laboratories)

Open / ASIC / FPGA Design Engineers (RECRUITER)

24 Apr 97 - misc.jobs.offered
<5jngt5$6s4@ron.ipa.com>
QuickPost@ipa.com

NNW in FPGA

9 Apr 97 - comp.ai.neural-nets
<Pine.SUN.3.91N2x.970409201139.5635B-100000@kth.se>
Thomas Lindblad <lindblad@kth.se>

Re: FPGA Express

9 Apr 97 - comp.lang.verilog
<334C0525.2781E494@lsil.com>
Carl Swanson <carl@lsil.com>

Re: FPGA Express

9 Apr 97 - comp.lang.verilog
<334d23f5.4180401@news.iaehv.nl>
jeanpaul@stack.urc.tue.nl (Jean-Paul Smeets)

Re: FPGA Express

11 Apr 97 - comp.lang.verilog
<5imlre$bq9$1@linda.teleport.com>
celiac@linda.teleport.com (Celia C.)

TMS380SRA in an FPGA?

13 Apr 97 - comp.arch.fpga
<5ir31k$oo8$2@news.goodnet.com>
waynet@goodnet.com (Wayne Turner)

Re: FPGA Express

14 Apr 97 - comp.lang.verilog
<01bc492c$d60f0af0$a83af6c0@ghoward>
"Gary Howard" <ghoward@intecom.com>

FLEX 8000 FPGA Configuration

18 Apr 97 - comp.arch.fpga
<01bc4c32$e198e220$3300a8c0@Kathia>
"Jacques Pelletier" <jpelletier@domosys.com>

FPGA gate counting: No truth in advertising

18 Apr 97 - comp.arch.fpga
<861402966.30419@dejanews.com>
kevintsmith@compuserve.com

FPGA gate counts - no truth in advertising?

21 Apr 97 - comp.arch.fpga
<861650624.414@dejanews.com>
kevintsmith@compuserve.com

US-FL-Tampa Bay Electrical Engineers, FPGA, QuickVHDL, Mentor Simulation Tools

22 Apr 97 - fl.jobs
<5jibhs$4ql$1@cambridge.emi.net>
warnold@emi.net (W.J. Arnold)

CA-Fremont-Hardware Design Engineer, FPGA/PLD, i960(Recruiter)

22 Apr 97 - ba.jobs.offered
<5jis1o$dsc@dfw-ixnews10.ix.netcom.com>
sherryj@boltongrp.com (Sherry)

US-IL-Chicago-HWE-FPGA, ASIC-Recruiter

22 Apr 97 - chi.jobs
<335cec76$11@dice.com>
roryp@r2services.com (R2 Services)

US-IL-Chicago-HWE-FPGA, ASIC-Recruiter

22 Apr 97 - chi.jobs
<335cec7b$14@dice.com>
randys@r2services.com (R2 Services)

SR. HARDWARE ENGS.; FPGA, LAN/WAN DESIGN; SILICON VALLEY

22 Apr 97 - misc.jobs.offered
<335d482b.6139834@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

SYS. DESIGN ENG.; PCB, ASIC, FPGA; SAN JOSE, CA

22 Apr 97 - misc.jobs.offered
<335d4861.6194506@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

HARDWARE DESIGN ENG., ASIC/FPGA; SAN JOSE, CA

22 Apr 97 - misc.jobs.offered
<335d4845.6166066@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

ASIC ENGINEER.; FPGA, RF, VHDL; MILPITAS, CA

22 Apr 97 - misc.jobs.offered
<335d4853.6179597@192.168.0.1>
gray@mccoyltd.com (McCoy Ltd. )

Re: FPGA gate counting: No truth in advertising

22 Apr 97 - comp.arch.fpga
<335DA63D.3F5D@cinenet.net>
Kayvon Irani <kirani@cinenet.net>

HW Engineer - CPLD/FPGA :(Bay Area, CA):recruiter

22 Apr 97 - ba.jobs.offered
<335D9AFF.BD5@ihot.com>
Vicky Agarwal <nettek@ihot.com>

CFP Design and Test (FPGA issue)

23 Apr 97 - comp.arch.fpga
<5jkv5r$b0t@news.tamu.edu>
fmeyer@cs.tamu.edu (Jackie Meyer)

Sunnyvale,CA>>Hardware Design Engineer/FPGA<<<<

23 Apr 97 - ba.jobs.offered
<335e84c4.0@news1.tacoma.net>
megan@intch.com

US-OR-Portland Field Applications Engineers (PLD, FPGA), The James Group

23 Apr 97 - biz.jobs.offered
<JAABAKV478.253@news.HeadHunter.NET>
"FREE www.HeadHunter.NET" <poster@headhunter.net>

NJ-JOB $DIGITAL DESIGN ENG./68000 MICROPROCESSORS/FPGA

23 Apr 97 - biz.jobs.offered
<5jlsn4$cor@jupiter.planet.net>
staffwk@saturn.planet.net (Staffworks NJ)

Re: 8-bit divider in FPGA

21 Mar 97 - comp.arch.fpga
<3332B3EF.6837@ccusc1.unical.it>
Pasquale Corsonello <pascor@ccusc1.unical.it>

Re: 8-bit divider in FPGA

21 Mar 97 - comp.arch.fpga
<3333684D.1A82@bc.sympatico.ca>
Tom Burgess <Tom_Burgess@bc.sympatico.ca>

Re: 8-bit divider in FPGA

24 Mar 97 - comp.arch.fpga
<33362D36.474D@nocrc.abb.no>
Johannes Soelhusvik <jso@nocrc.abb.no>

Re: 8-bit divider in FPGA

24 Mar 97 - comp.arch.fpga
<O3Zo0CAbSuNzEw+T@smte.demon.co.uk>
Andrew Papageorgiou <ap@smte.demon.co.uk>

Re: StrongARM a la Galileo?

25 Mar 97 - comp.sys.acorn.hardware
<5h8dsg$o0n@erlang.praxis.co.uk>
adi@praxis.co.uk (Adrian Hilton)

Re: ICCIMA'98 First Call for Papers

27 Mar 97 - comp.ai.neural-nets
<3339CDD0.7C61@mail.club-internet.fr>
Roth <vbroth@mail.club-internet.fr>

Re: 8-bit divider in FPGA

26 Mar 97 - comp.arch.fpga
<33399D6B.30939B7@inventor.isu.edu>
Vitit Kantabutra <cad@inventor.isu.edu>

Re: 8-bit divider in FPGA

28 Mar 97 - comp.arch.fpga
<333B8E8E.56D7@bc.sympatico.ca>
Tom Burgess <Tom_Burgess@bc.sympatico.ca>

Any FPGA with 6809 core?

27 Mar 97 - comp.arch.fpga
<333A2CC5.6747@scase.no>
"Tore H. Larsen" <thl@scase.no>

Free VHDL /FPGA newsletter

31 Mar 97 - comp.arch.fpga
<333F5A3E.7DC6@erols.com>
Richard Schwarz <aaps@erols.com>

Re: Any FPGA with 6809 core?

31 Mar 97 - comp.arch.fpga
<333FA467.2E6C@vautomation.com>
Eric Ryherd <eric@vautomation.com>

Re: 8-bit divider in FPGA

1 Apr 97 - comp.arch.fpga
<333d1ddc.9375150@tera.jprc.com>
r.m.muechn+ieee.org (Robert M. M�nch)

Re: 8-bit divider in FPGA

2 Apr 97 - comp.arch.fpga
<33426509.412F@nocrc.abb.no>
Johannes Soelhusvik <jso@nocrc.abb.no>

QAM in FPGA

3 Apr 97 - comp.arch.fpga
<01bc3fca$9f763880$a9c019cb@ametcalfe.upl.com.au>
"Andrew Metcalfe" <metcalfe@iaccess.com.au>

FPGA Express

5 Apr 97 - comp.lang.verilog
<33462F5B.13F9@tc-iris.tau.ac.il>
Ori Vinokur <ori@tc-iris.tau.ac.il>

FFT in FPGA

7 Apr 97 - comp.arch.fpga
<5ia9ru$l76@news.cis.nctu.edu.tw>
cpsu@slider (Chyr-Pyng Su)

Re: FFT in FPGA

7 Apr 97 - comp.arch.fpga
<01bc4371$2dba97e0$b6bfb8cd@default>
"Steven K. Knapp" <optmagic@ix.netcom.com>

Re: FPGA Express

9 Apr 97 - comp.lang.verilog
<334C0525.2781E494@lsil.com>
Carl Swanson <carl@lsil.com>

Re: FPGA Express

9 Apr 97 - comp.lang.verilog
<334d23f5.4180401@news.iaehv.nl>
jeanpaul@stack.urc.tue.nl (Jean-Paul Smeets)

Re: FPGA Express

11 Apr 97 - comp.lang.verilog
<5imlre$bq9$1@linda.teleport.com>
celiac@linda.teleport.com (Celia C.)

TMS380SRA in an FPGA?

13 Apr 97 - comp.arch.fpga
<5ir31k$oo8$2@news.goodnet.com>
waynet@goodnet.com (Wayne Turner)

Re: FPGA Express

14 Apr 97 - comp.lang.verilog
<01bc492c$d60f0af0$a83af6c0@ghoward>
"Gary Howard" <ghoward@intecom.com>

FLEX 8000 FPGA Configuration

18 Apr 97 - comp.arch.fpga
<01bc4c32$e198e220$3300a8c0@Kathia>
"Jacques Pelletier" <jpelletier@domosys.com>

FPGA gate counting: No truth in advertising

18 Apr 97 - comp.arch.fpga
<861402966.30419@dejanews.com>
kevintsmith@compuserve.com

FPGA gate counts - no truth in advertising?

21 Apr 97 - comp.arch.fpga
<861650624.414@dejanews.com>
kevintsmith@compuserve.com

US-FL-Tampa Bay Electrical Engineers, FPGA, QuickVHDL, Mentor Simulation Tools

22 Apr 97 - fl.jobs
<5jibhs$4ql$1@cambridge.emi.net>
warnold@emi.net (W.J. Arnold)

US-IL-Chicago-HWE-FPGA, ASIC-Recruiter

22 Apr 97 - misc.jobs.contract
<335cec76$11@dice.com>
roryp@r2services.com (R2 Services)

FCCM'97 Preliminary Program

1 Apr 97 - comp.arch
<5hrrcg$n1@potomac.znet.com>
jmarnold@potomac.znet.com (Jeffrey M. Arnold)

Surveys on Reconfigurable Computing now available

14 Apr 97 - comp.arch.fpga
<hauck-1404970103420001@bellport8.ece.nwu.edu>
hauck@ece.nwu.edu (Scott A. Hauck)

Tutorial on Reconfigurable Computing at DAC, June 13th, Anaheim

14 Apr 97 - comp.arch.fpga
<hauck-1404970107240001@bellport8.ece.nwu.edu>
hauck@ece.nwu.edu (Scott A. Hauck)

Correction: Surveys on Reconfigurable Computing now available

14 Apr 97 - comp.arch.fpga
<5iufq1$ji5$1@news.ece.nwu.edu>
hauck@ece.nwu.edu (Scott Alan Hauck)

Re: Reconfigurable Computing

23 Apr 97 - comp.arch.fpga
<5jl621$6i8@potomac.znet.com>
jmarnold@potomac.znet.com (Jeffrey M. Arnold)

Tutorial on Reconfigurable Computing at DAC, June 13th, Anaheim

2 May 97 - comp.arch.fpga
<hauck-0205971018270001@vienna.ece.nwu.edu>
hauck@ece.nwu.edu (Scott A. Hauck)

PART 97 Conference: Special Session - Reconfigurable Computing

21 Apr 97 - comp.arch.fpga
<5jernk$e5f@dove.qut.edu.au>
n.bergman@qut.edu.au (Dr. Neil Bergman)

Reconfigurable logic

16 Mar 97 - comp.arch
<332BBF8B.2963@ix.netcom.com>
Shigeki Shimomura <shimo@ix.netcom.com>

Re: Reconfigurable logic

17 Mar 97 - comp.arch
<332CDF60.4D63@churchill.columbiasc.ncr.com>
Joe Hinrichs <jhinrich@churchill.columbiasc.ncr.com>

Re: Reconfigurable logic

18 Mar 97 - comp.arch
<5gma3h$1i0s@news.rchland.ibm.com>
cecchi@signa.rchland.ibm.com (Del Cecchi)

Reconfigurable Computing

23 Apr 97 - comp.arch.fpga
<5jk8hh$jh2@newsstand.cit.cornell.edu>
pirger@astrosun.tn.cornell.edu (Bruce Pirger)

Parallel reconfigurable Mesh Simulator?

5 May 97 - comp.arch
<5klnp6$bpb@seagoon.newcastle.edu.au>
carsten@cs.newcastle.edu.au (Carsten Steckel)

Call for participation, Advanced PLD & FPGA Day UK and Sweden

24 Apr 97 - comp.arch.fpga
<766787499wnr@lfields.demon.co.uk>
Peter Clarke <pclarke@lfields.demon.co.uk>

US-MD-Annapolis , Electrical and Computer Engineers, ASIC, Xilinx FPGA Hardware, Software Design

23 Apr 97 - dc.jobs
<5jludv$8uf@lana.zippo.com>
ams@annapmicro.com (Annapolis Micro Systems, Inc.)

US-MD-Annapolis , Electrical and Computer Engineers, ASIC, Xilinx FPGA Hardware, Software Design

1 May 97 - dc.jobs
<5kaqfo$22f@snews1.zippo.com>
ams@annapmicro.com (Annapolis Micro Systems, Inc.)

Re: Xilinx FPGA & SIMMs

11 Mar 97 - comp.arch.fpga
<33259D96.4BBA@univision.com>
"John L. Smith" <jsmith@univision.com>

Re: Xil FPGA: Usage of Multi-purpose pins as I/O

11 Mar 97 - comp.arch.fpga
<3325F0B3.2A4C@xilinx.com>
Peter Alfke <peter@xilinx.com>

Re: FPGA Reliability

12 Mar 97 - comp.arch.fpga
<peter-1203970955240001@appsmac-1.xilinx.com>
peter@xilinx.com (Peter Alfke)

Re: Xil FPGA: Usage of Multi-purpose pins as I/O

13 Mar 97 - comp.arch.fpga
<332805e3.72615784@news.wwa.com>
aweir@spherecom.com (Alan Weir)

Re: FPGA Reliability

13 Mar 97 - comp.arch.fpga
<01bc2fd4$8fc5ac00$6e0db780@Rich>
"Rich K." <rich.katz@gsfc.nasa.gov>

Re: Xilinx FPGA & SIMMs

14 Mar 97 - comp.arch.fpga
<kS9y9HAW5bKzEww6@smte.demon.co.uk>
Andrew Papageorgiou <ap@smte.demon.co.uk>

FPGA and PLL

21 Mar 97 - comp.arch.fpga
<A.Cosic.1823.3331D4F3@eee.utas.edu.au>
A.Cosic@eee.utas.edu.au (Alec Cosic)

FPGA CLB USAGE

21 Mar 97 - comp.arch.fpga
<33320A08.5CC6@uqtr.uquebec.ca>
Samir Marc Falaki <Samir_Marc_Falaki@uqtr.uquebec.ca>