REGULAR LAYOUT AND LAYOUT-DRIVEN LOGIC SYNTHESIS

  1. Ning Song, Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, and Andisheh Sarabi, "A New Design Methodology for Two-Dimensional Logic Arrays," VLSI Design, 1995, Vol. 3., Nos. 3-4, pp. 315-332.


  2. Marek Perkowski, Andisheh Sarabi, and F. Rudolph Beyl, "Universal XOR Canonical Forms of Boolean Functions and its Subset Family of AND/OR/XOR Canonical Forms", Record of IWLS'95 Conference, April 1995, Lake Tahoe, CA. postscript
  3. Edmund Pierzchala, Osama K. Shana'a, Paul Van Halen, and Marek A. Perkowski, ``Low-Voltage Gilbert Current-Gain Cell,'' Proc. ISCAS 1996, Atlanta, Georgia.


  4. Ning Song, Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, and Andisheh Sarabi, "A New Design Methodology for Two-Dimensional Logic Arrays," VLSI Design, 1995, Vol. 3., Nos. 3-4, pp. 315-332.


  5. Edmund Pierzchala, Marek A. Perkowski, Paul Van Halen, and Rolf Schaumann, "Current-mode Amplifier/Integrator for a Field-Programmable Analog Array," Intern. Solid State Circuit Conference Dig. Technical Papers, San Francisco, CA, February 1995.
    Slides from ISSCC'95 conference.

  6. Marek A. Perkowski, Andisheh Sarabi, and F. Rudolph Beyl, "Fundamental Theorems and Families of Linearly Independent Forms for Binary and Multiple Valued", Proc. of the Second Workshop on Applications of Reed-Muller Expansion in Circuit Design, Chiba City, Japan, 27-29 August 1995, pp. 288-299.
  7. Edmund Pierzchala, Rolf Schaumann, Paul Van Halen, Stanislaw Szczepanski, and Marek A. Perkowski, "Highly Linear VHF Current Mode Miller Integrator with 90 dB DC Gain," Proc. ISCAS 1995, pp. 1852-1859, Seattle, WA.
    Postscript of our paper from ISCAS'95 conference.

  8. Marek Perkowski, Andisheh Sarabi, and F. Rudolph Beyl, "Universal XOR Canonical Forms of Boolean Functions and its Subset Family of AND/OR/XOR Canonical Forms", Record of IWLS'95 Conference, April 1995, Lake Tahoe, CA. postscript
  9. M. A. Perkowski, M. Chrzanowska-Jeske, A. Coppola, E. Pierzchala, "An Exact Solution to the Fitting Problem in the Application Specific State Machine Device," Journal od Circuits, Systems and Computers , Vol. 4, No. 2, pp. 173 - 190, 1994.


  10. A. Sarabi, N. Song, M. Chrzanowska-Jeske, M. A. Perkowski, "A Comprehensive Approach to Logic Synthesis and Physical Design for Two-Dimensional Logic Arrays," Proc. DAC'94, San Diego, June 1994, pp. 321 - 326.


  11. M. A. Perkowski, M. Chrzanowska-Jeske, "Multiple-Valued-Input TANT Networks," Proc. ISMVL'94, pp. 334-341, Boston, MA, May 25-27, 1994.
    postscript of the paper.


  12. E. Pierzchala, M. A. Perkowski, S. Grygiel, "A Field Programmable Analog Arrray for Continuous, Fuzzy and Multi-Valued Logic Applications," Proc. ISMVL'94, pp. 148 - 155, Boston, MA, May 25-27, 1994.
    Postscript of our paper from ISMVL'94 conference in Boston.

    All slides from ISMVL'94 conference in Boston.

    to find more on this topic go there....

  13. E. Pierzchala, M. Perkowski, "High Speed Field Programmable Analog Array Architecture Design," Proc. of the FPGA'94, 1994 ACM/SIGDA Second International Workshop on Field-Programmable Gate Arrays, Session 4. pp. 1-10, Berkeley, February 1994.
    Postscript of our paper from FPGA'94 conference.

    All slides from FPGA'94 conference.
    to find more on this topic go there....
  14. L. F. Wu, M. A. Perkowski, "Minimization of Permuted Reed-Muller Trees for Cellular Logic Programmable Gate Arrays," In H. Gruenbacher and R. Hartenstein, (eds.), "Lecture Notes in Computer Science", Number 705, Springer Verlag, pp. 78-87, Berlin/Heidelberg, 1993.
    postscript with no figures
    the original is in /stash/mperkows3/=EXOR-papers-90-94

  15. A. Coppola, M. A. Perkowski, R. Anderson, J.S. Freedman, E. Pierzchala, "Tokenized State Machine Model for Synthesis of Sequential Circuits into EPLDs and FPGAs," In G. Saucier, (ed.), North-Holland, 1993.


  16. I. Schaefer, M. A. Perkowski, H. Wu, "Multilevel Logic Synthesis for Cellular FPGAs Based on Orthogonal Expansions," Proc. of IFIP W.G. 10.5 Workshop on Applications of the Reed-Muller Expansion in Circuit Design," Hamburg, Germany, September 16-17, pp. 42 - 51, 1993.
    postscript

  17. M. A. Perkowski, "A Fundamental Theorem for EXOR Circuits," Proc. of IFIP W.G. 10.5 Workshop on Applications of the Reed-Muller Expansion in Circuit Design," Hamburg, Germany, September 16-17, pp. 52 - 60, 1993.


  18. M. A. Perkowski, A. Sarabi, F. R. Beyl, "Universal XOR Canonical Forms of Switching Functions," Proc. of IFIP W.G. 10.5 Workshop on Applications of the Reed-Muller Expansion in Circuit Design," Hamburg, Germany, September 16-17, pp. 27 - 32, 1993.


  19. N. Song, M. A. Perkowski, "A New Design Methodology for Two-Dimensional Logic Arrays," Proc. of IEEE International Workshop on Logic Synthesis, IWLS '93, Tahoe City, CA, pp. 1 - 17, May 1993.


  20. H. Wu, M. A. Perkowski, "Synthesis for Reed-Muller Directed-Acyclic-Graph networks with applications to Binary Decision Diagrams and Fine Grain FPGA Mapping," Proc. of IEEE International Workshop on Logic Synthesis, IWLS '93, Tahoe City, CA, pp. P8d-1 - P8d-6, May 1993.


  21. M. Perkowski, "FPGA Computer Architectures," Proc. of Northcon '93, pp. 87 - 92, Portland, Oregon, October 12 - 14, 1993.


  • Alan Coppola, Marek A. Perkowski, Robert Anderson, Jeffrey S. Freedman, and Edmund Pierzchala, "Synthesis of Very Fast Distributed Controllers Based on Tokenized State Machine Model," Proc. of IFIP Workshop on Control Dominated RTL Synthesis, Grenoble, France, pp. 1 - 15, September 3-4, 1992.


  • Li-Fei Wu, and Marek A. Perkowski, "Minimization of Permuted Reed-Muller Trees for Cellular Logic Programmable Gate Arrays," Proc. of the 2nd Intern. Workshop on Field-Programmable Logic and Applications, FPL'92, Vienna, Austria, pp. 7/4.1-7/4.4, August 31-September 2, 1992.


  • Robert Anderson, Alan Coppola, Jeffrey Freedman, and Marek A. Perkowski, "VHDL Synthesis of Concurrent State Machines to a Programmable Logic Device," Proc. of the IEEE VHDL International User's Forum, May 3 - 6, Scottsdale, Arizona, 1992.


  • Marek A. Perkowski, and Alan Coppola, "A State Machine PLD and Associated Minimization Algorithms," Proc. of the FPGA'92, 1992 ACM/SIGDA First International Workshop on Field-Programmable Gate Arrays, pp. 109 - 114, Berkeley, February 16-18, 1992.


  • Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Alan Coppola, and Edmund Pierzchala, "An Exact Algorithm for the Technology Fitting Problem in the Application Specific State Machine Device," Proc. of the ISCAS'92, International Symposium on Circuits and Systems, pp. 1977 - 1980, San Diego, CA, May 10-13, 1992.